/**
  ******************************************************************************
  * @file    sym32l010_hal_sysctrl.h
  * @author  AE Team
  * @version 1.0.3
  * @date    2024-05-28
  * @brief   Header file of SYSCTRL HAL module.
  *
  ******************************************************************************
  * @attention
  *
  * <h2><center>&copy; Copyright (c) 2024 SIYIMicro.
  * All rights reserved.</center></h2>
  *
  *
  ******************************************************************************
  */


/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __SYM32L010_HAL_SYSCTRL_H
#define __SYM32L010_HAL_SYSCTRL_H

#ifdef __cplusplus
extern "C" {
#endif


/******************************************************************************/
/* Include files                                                              */
/******************************************************************************/
#include "sym32l010_hal_def.h"


/******************************************************************************/
/* Global type definitions                                                    */
/******************************************************************************/
/* SYSCYRL SYSCTRL2HCLK DIV --------------------------------------------------*/
typedef enum
{
    SYSCTRL_SYSCLK2HCLK_DIV1     = (0x0UL << SYSCTRL_CR0_HCLKPRS_Pos),  /*!< SYSCLK not divided            */
    SYSCTRL_SYSCLK2HCLK_DIV2     = (0x1UL << SYSCTRL_CR0_HCLKPRS_Pos),  /*!< SYSCLK divided by 2           */
    SYSCTRL_SYSCLK2HCLK_DIV4     = (0x2UL << SYSCTRL_CR0_HCLKPRS_Pos),  /*!< SYSCLK divided by 4           */
    SYSCTRL_SYSCLK2HCLK_DIV8     = (0x3UL << SYSCTRL_CR0_HCLKPRS_Pos),  /*!< SYSCLK divided by 8           */
    SYSCTRL_SYSCLK2HCLK_DIV16    = (0x4UL << SYSCTRL_CR0_HCLKPRS_Pos),  /*!< SYSCLK divided by 16          */
    SYSCTRL_SYSCLK2HCLK_DIV32    = (0x5UL << SYSCTRL_CR0_HCLKPRS_Pos),  /*!< SYSCLK divided by 32          */
    SYSCTRL_SYSCLK2HCLK_DIV64    = (0x6UL << SYSCTRL_CR0_HCLKPRS_Pos),  /*!< SYSCLK divided by 64          */
    SYSCTRL_SYSCLK2HCLK_DIV128   = (0x7UL << SYSCTRL_CR0_HCLKPRS_Pos)   /*!< SYSCLK divided by 128         */
} SYSCTRL_HclkPrsTypeDef;

/* SYSCTRL HCLK2PCLK DIV -----------------------------------------------------*/
typedef enum
{
    SYSCTRL_HCLK2PCLK_DIV1       = (0x0UL << SYSCTRL_CR0_PCLKPRS_Pos),  /*!< HCLK not divided              */
    SYSCTRL_HCLK2PCLK_DIV2       = (0x1UL << SYSCTRL_CR0_PCLKPRS_Pos),  /*!< HCLK divided by 2             */
    SYSCTRL_HCLK2PCLK_DIV4       = (0x2UL << SYSCTRL_CR0_PCLKPRS_Pos),  /*!< HCLK divided by 4             */
    SYSCTRL_HCLK2PCLK_DIV8       = (0x3UL << SYSCTRL_CR0_PCLKPRS_Pos)   /*!< HCLK divided by 8             */
} SYSCTRL_PclkPrsTypeDef;

/* SYSCTRL SYSCLK SOURSE------------------------------------------------------*/
typedef enum
{
    SYSCTRL_SYSCLKSRC_HSI        = (0x0UL << SYSCTRL_CR0_SYSCLK_Pos),   /*!< HSI selected as system clock  */
    SYSCTRL_SYSCLKSRC_HSE        = (0x1UL << SYSCTRL_CR0_SYSCLK_Pos),   /*!< HSE selected as system clock  */
    SYSCTRL_SYSCLKSRC_LSI        = (0x3UL << SYSCTRL_CR0_SYSCLK_Pos),   /*!< LSI selected as system clock  */
    SYSCTRL_SYSCLKSRC_LSE        = (0x4UL << SYSCTRL_CR0_SYSCLK_Pos)    /*!< LSE selected as system clock  */
} SYSCTRL_SysClkSrcTypeDef;

/* SYSCTRL Wakeup Clk --------------------------------------------------------*/
typedef enum
{
    WAKEUPCLK_DEFAULT            = (0x0U << SYSCTRL_CR2_WAKEUPCLK_Pos),
    WAKEUPCLK_HSI4MHz            = (0x1U << SYSCTRL_CR2_WAKEUPCLK_Pos)
} SYSCTRL_WakeupClkTypeDef;

/* SYSCTRL HSIOSC DIV --------------------------------------------------------*/
typedef enum
{
    HSIOSC_TO_HSI48MHZ           = (0x1UL << SYSCTRL_HSI_DIV_Pos),
    HSIOSC_TO_HSI24MHZ           = (0x2UL << SYSCTRL_HSI_DIV_Pos),
    HSIOSC_TO_HSI16MHZ           = (0x3UL << SYSCTRL_HSI_DIV_Pos),
    HSIOSC_TO_HSI12MHZ           = (0x4UL << SYSCTRL_HSI_DIV_Pos),
    HSIOSC_TO_HSI9P60MHZ         = (0x5UL << SYSCTRL_HSI_DIV_Pos),
    HSIOSC_TO_HSI8MHZ            = (0x6UL << SYSCTRL_HSI_DIV_Pos),
    HSIOSC_TO_HSI6P86MHZ         = (0x7UL << SYSCTRL_HSI_DIV_Pos),
    HSIOSC_TO_HSI6MHZ            = (0x8UL << SYSCTRL_HSI_DIV_Pos),
    HSIOSC_TO_HSI5P33MHZ         = (0x9UL << SYSCTRL_HSI_DIV_Pos),
    HSIOSC_TO_HSI4P80MHZ         = (0xAUL << SYSCTRL_HSI_DIV_Pos),
    HSIOSC_TO_HSI4P36MHZ         = (0xBUL << SYSCTRL_HSI_DIV_Pos),
    HSIOSC_TO_HSI4MHZ            = (0xCUL << SYSCTRL_HSI_DIV_Pos),
    HSIOSC_TO_HSI3P69MHZ         = (0xDUL << SYSCTRL_HSI_DIV_Pos),
    HSIOSC_TO_HSI3P43MHZ         = (0xEUL << SYSCTRL_HSI_DIV_Pos),
    HSIOSC_TO_HSI3P20MHZ         = (0xFUL << SYSCTRL_HSI_DIV_Pos),
    HSIOSC_TO_HSI3MHZ            = (0x0UL << SYSCTRL_HSI_DIV_Pos)
} SYSCTRL_HsiOscDivTypeDef;

/* SYSCTRL LSI WAITCYCLE -----------------------------------------------------*/
typedef enum
{
    SYSCTRL_LSI_WAITCYCLE_6      = (0x0UL << SYSCTRL_LSI_WAITCYCLE_Pos),
    SYSCTRL_LSI_WAITCYCLE_18     = (0x1UL << SYSCTRL_LSI_WAITCYCLE_Pos),
    SYSCTRL_LSI_WAITCYCLE_66     = (0x2UL << SYSCTRL_LSI_WAITCYCLE_Pos),
    SYSCTRL_LSI_WAITCYCLE_258    = (0x3UL << SYSCTRL_LSI_WAITCYCLE_Pos)
} SYSCTRL_LsiWaitCycleTypeDef;

/* SYSCTRL HSE Filter --------------------------------------------------------*/
typedef enum
{
    SYSCTRL_HSE_FLT_DISABLE      = (0x0UL << SYSCTRL_HSE_FLTEN_Pos),
    SYSCTRL_HSE_FLT_ENABLE       = (0x1UL << SYSCTRL_HSE_FLTEN_Pos)
} SYSCTRL_HseFilterEnTypeDef;

/* SYSCTRL HSE HEXENPOL ------------------------------------------------------*/
typedef enum
{
    SYSCTRL_HEXENPOL_POSITIVE    = (0x0UL << SYSCTRL_HSE_HEXENPOL_Pos),
    SYSCTRL_HEXENPOL_NEGATIVE    = (0x1UL << SYSCTRL_HSE_HEXENPOL_Pos)
} SYSCTRL_HexEnPolTypeDef;

/* SYSCTRL HSE MODE ----------------------------------------------------------*/
typedef enum
{
    SYSCTRL_HSE_MODE_OSC         = (0x0UL << SYSCTRL_HSE_MODE_Pos),
    SYSCTRL_HSE_MODE_CLK         = (0x1UL << SYSCTRL_HSE_MODE_Pos)
} SYSCTRL_HseModeTypeDef;

/* HSE WAITCYCL --------------------------------------------------------------*/
typedef enum
{
    SYSCTRL_HSE_WAITCYCLE_8192   = (0x0UL << SYSCTRL_HSE_WAITCYCLE_Pos),
    SYSCTRL_HSE_WAITCYCLE_32768  = (0x1UL << SYSCTRL_HSE_WAITCYCLE_Pos),
    SYSCTRL_HSE_WAITCYCLE_131072 = (0x2UL << SYSCTRL_HSE_WAITCYCLE_Pos),
    SYSCTRL_HSE_WAITCYCLE_262144 = (0x3UL << SYSCTRL_HSE_WAITCYCLE_Pos)
} SYSCTRL_HseWaitcycleTypeDef;

/* SYSCTRL HSE DRIVER --------------------------------------------------------*/
typedef enum
{
    SYSCTRL_HSE_DRIVER_0         = (0x0UL << SYSCTRL_HSE_DRIVER_Pos),
    SYSCTRL_HSE_DRIVER_1         = (0x1UL << SYSCTRL_HSE_DRIVER_Pos),
    SYSCTRL_HSE_DRIVER_2         = (0x2UL << SYSCTRL_HSE_DRIVER_Pos),
    SYSCTRL_HSE_DRIVER_3         = (0x3UL << SYSCTRL_HSE_DRIVER_Pos),
    SYSCTRL_HSE_DRIVER_4         = (0x4UL << SYSCTRL_HSE_DRIVER_Pos),
    SYSCTRL_HSE_DRIVER_5         = (0x5UL << SYSCTRL_HSE_DRIVER_Pos),
    SYSCTRL_HSE_DRIVER_6         = (0x6UL << SYSCTRL_HSE_DRIVER_Pos),
    SYSCTRL_HSE_DRIVER_7         = (0x7UL << SYSCTRL_HSE_DRIVER_Pos)
} SYSCTRL_HseDrivrTypeDef;

/* SYSCTRL LSE PINLOCK -------------------------------------------------------*/
typedef enum
{
    SYSCTRL_LSE_PINLOCK_DISABLE  = (0x0UL << SYSCTRL_LSE_PINLOCK_Pos),
    SYSCTRL_LSE_PINLOCK_ENABLE   = (0x1UL << SYSCTRL_LSE_PINLOCK_Pos)
} SYSCTRL_LsePinLockEnTypeDef;

/* SYSCTRL LSE MODE ----------------------------------------------------------*/
typedef enum
{
    SYSCTRL_LSE_MODE_OSC         = (0x0UL << SYSCTRL_LSE_MODE_Pos),
    SYSCTRL_LSE_MODE_CLK         = (0x1UL << SYSCTRL_LSE_MODE_Pos)
} SYSCTRL_LseModeTypeDef;

/* LSE WAITCYCL --------------------------------------------------------------*/
typedef enum
{
    SYSCTRL_LSE_WAITCYCLE_256    = (0x0UL << SYSCTRL_LSE_WAITCYCLE_Pos),
    SYSCTRL_LSE_WAITCYCLE_1024   = (0x1UL << SYSCTRL_LSE_WAITCYCLE_Pos),
    SYSCTRL_LSE_WAITCYCLE_4096   = (0x2UL << SYSCTRL_LSE_WAITCYCLE_Pos),
    SYSCTRL_LSE_WAITCYCLE_16384  = (0x3UL << SYSCTRL_LSE_WAITCYCLE_Pos)
} SYSCTRL_LseWaitcycleTypeDef;

/* SYSCTRL LSE DRIVER --------------------------------------------------------*/
typedef enum
{
    SYSCTRL_LSE_DRIVER_0         = (0x0UL << SYSCTRL_LSE_DRIVER_Pos),
    SYSCTRL_LSE_DRIVER_1         = (0x1UL << SYSCTRL_LSE_DRIVER_Pos),
    SYSCTRL_LSE_DRIVER_2         = (0x2UL << SYSCTRL_LSE_DRIVER_Pos),
    SYSCTRL_LSE_DRIVER_3         = (0x3UL << SYSCTRL_LSE_DRIVER_Pos),
    SYSCTRL_LSE_DRIVER_4         = (0x4UL << SYSCTRL_LSE_DRIVER_Pos),
    SYSCTRL_LSE_DRIVER_5         = (0x5UL << SYSCTRL_LSE_DRIVER_Pos),
    SYSCTRL_LSE_DRIVER_6         = (0x6UL << SYSCTRL_LSE_DRIVER_Pos),
    SYSCTRL_LSE_DRIVER_7         = (0x7UL << SYSCTRL_LSE_DRIVER_Pos),
    SYSCTRL_LSE_DRIVER_8         = (0x8UL << SYSCTRL_LSE_DRIVER_Pos),
    SYSCTRL_LSE_DRIVER_9         = (0x9UL << SYSCTRL_LSE_DRIVER_Pos),
    SYSCTRL_LSE_DRIVER_10        = (0xAUL << SYSCTRL_LSE_DRIVER_Pos),
    SYSCTRL_LSE_DRIVER_11        = (0xBUL << SYSCTRL_LSE_DRIVER_Pos),
    SYSCTRL_LSE_DRIVER_12        = (0xCUL << SYSCTRL_LSE_DRIVER_Pos),
    SYSCTRL_LSE_DRIVER_13        = (0xDUL << SYSCTRL_LSE_DRIVER_Pos),
    SYSCTRL_LSE_DRIVER_14        = (0xEUL << SYSCTRL_LSE_DRIVER_Pos),
    SYSCTRL_LSE_DRIVER_15        = (0xFUL << SYSCTRL_LSE_DRIVER_Pos)
} SYSCTRL_LseDrivrTypeDef;

/* SYSCTRL MCO Div -----------------------------------------------------------*/
typedef enum
{
    SYSCTRL_MCO_DIV1             = (0x0UL << SYSCTRL_MCO_DIV_Pos),
    SYSCTRL_MCO_DIV2             = (0x1UL << SYSCTRL_MCO_DIV_Pos),
    SYSCTRL_MCO_DIV8             = (0x2UL << SYSCTRL_MCO_DIV_Pos),
    SYSCTRL_MCO_DIV64            = (0x3UL << SYSCTRL_MCO_DIV_Pos),
    SYSCTRL_MCO_DIV128           = (0x4UL << SYSCTRL_MCO_DIV_Pos),
    SYSCTRL_MCO_DIV256           = (0x5UL << SYSCTRL_MCO_DIV_Pos),
    SYSCTRL_MCO_DIV512           = (0x6UL << SYSCTRL_MCO_DIV_Pos),
    SYSCTRL_MCO_DIV1024          = (0x7UL << SYSCTRL_MCO_DIV_Pos)
} SYSCTRL_McoDivTypeDef;

/* SYSCTRL MCO SOURSE --------------------------------------------------------*/
typedef enum
{
    SYSCTRL_MCO_SRC_NONE         = (0x0UL << SYSCTRL_MCO_SOURCE_Pos),
    SYSCTRL_MCO_SRC_HCLK         = (0x1UL << SYSCTRL_MCO_SOURCE_Pos),
    SYSCTRL_MCO_SRC_PCLK         = (0x2UL << SYSCTRL_MCO_SOURCE_Pos),
    SYSCTRL_MCO_SRC_HSIOSC       = (0x3UL << SYSCTRL_MCO_SOURCE_Pos),
    SYSCTRL_MCO_SRC_LSI          = (0x4UL << SYSCTRL_MCO_SOURCE_Pos),
    SYSCTRL_MCO_SRC_HSE          = (0x5UL << SYSCTRL_MCO_SOURCE_Pos),
    SYSCTRL_MCO_SRC_LSE          = (0x6UL << SYSCTRL_MCO_SOURCE_Pos)
} SYSCTRL_McoSrcTypeDef;

/******************************************************************************/
/* Global pre-processor symbols/macros ('#define')                            */
/******************************************************************************/
/* ICR------------------------------------------------------------------------*/
#define SYSCTRL_ICR_FLAG_HSEFAULT       (SYSCTRL_ICR_HSEFAULT_Msk)
#define SYSCTRL_ICR_FLAG_LSEFAULT       (SYSCTRL_ICR_LSEFAULT_Msk)
#define SYSCTRL_ICR_FLAG_HSEFAIL        (SYSCTRL_ICR_HSEFAIL_Msk)
#define SYSCTRL_ICR_FLAG_LSEFAIL        (SYSCTRL_ICR_LSEFAIL_Msk)
#define SYSCTRL_ICR_FLAG_LSERDY         (SYSCTRL_ICR_LSERDY_Msk)
#define SYSCTRL_ICR_FLAG_LSIRDY         (SYSCTRL_ICR_LSIRDY_Msk)
#define SYSCTRL_ICR_FLAG_HSERDY         (SYSCTRL_ICR_HSERDY_Msk)
#define SYSCTRL_ICR_FLAG_HSIRDY         (SYSCTRL_ICR_HSIRDY_Msk)
#define SYSCTRL_ICR_FLAG_ALL            (0x1FFUL)


/******************************************************************************/
/* Global macro function                                                      */
/******************************************************************************/
/**
  * @brief  获取 SYSCTRL 中断触发源
  * @param  ITSOURCE : SYSCTRL 中断触发源
  *                    @arg SYSCTRL_IER_HSEFAULT_Msk
  *                    @arg SYSCTRL_IER_LSEFAULT_Msk
  *                    @arg SYSCTRL_IER_HSEFAIL_Msk
  *                    @arg SYSCTRL_IER_LSEFAIL_Msk
  *                    @arg SYSCTRL_IER_LSERDY_Msk
  *                    @arg SYSCTRL_IER_LSIRDY_Msk
  *                    @arg SYSCTRL_IER_HSERDY_Msk
  *                    @arg SYSCTRL_IER_HSIRDY_Msk
  * @retval
  */
#define HAL_SYSCTRL_GET_IT_SOURCE(ITSOURCE)      (SYM_SYSCTRL->IER & (ITSOURCE))

/**
  * @brief  使能 SYSCTRL 中断触发源
  * @param  ITSOURCE : SYSCTRL 中断触发源
  *                    @arg SYSCTRL_IER_HSEFAULT_Msk
  *                    @arg SYSCTRL_IER_LSEFAULT_Msk
  *                    @arg SYSCTRL_IER_HSEFAIL_Msk
  *                    @arg SYSCTRL_IER_LSEFAIL_Msk
  *                    @arg SYSCTRL_IER_LSERDY_Msk
  *                    @arg SYSCTRL_IER_LSIRDY_Msk
  *                    @arg SYSCTRL_IER_HSERDY_Msk
  *                    @arg SYSCTRL_IER_HSIRDY_Msk
  * @retval
  */
#define HAL_SYSCTRL_ENABLE_IT(ITSOURCE)          (SYM_SYSCTRL->IER |= (SYSCTRL_CR_KEY | ((uint16_t)ITSOURCE)))

/**
  * @brief  关闭 SYSCTRL 中断触发源
  * @param  ITSOURCE : SYSCTRL 中断触发源
  *                    @arg SYSCTRL_IER_HSEFAULT_Msk
  *                    @arg SYSCTRL_IER_LSEFAULT_Msk
  *                    @arg SYSCTRL_IER_HSEFAIL_Msk
  *                    @arg SYSCTRL_IER_LSEFAIL_Msk
  *                    @arg SYSCTRL_IER_LSERDY_Msk
  *                    @arg SYSCTRL_IER_LSIRDY_Msk
  *                    @arg SYSCTRL_IER_HSERDY_Msk
  *                    @arg SYSCTRL_IER_HSIRDY_Msk
  * @retval
  */
#define HAL_SYSCTRL_DISABLE_IT(ITSOURCE)         (SYM_SYSCTRL->IER = (SYSCTRL_CR_KEY | \
                                                                      (SYM_SYSCTRL->IER & (~((uint16_t)(ITSOURCE))))))

/**
  * @brief  获取 SYSCTRL 时钟标志
  * @param  FLAG : SYSCTRL 时钟标志
  *                @arg SYSCTRL_ISR_LSESTABLE_Msk
  *                @arg SYSCTRL_ISR_LSISTABLE_Msk
  *                @arg SYSCTRL_ISR_HSESTABLE_Msk
  *                @arg SYSCTRL_ISR_HSISTABLE_Msk
  *                @arg SYSCTRL_ISR_HSEFAULT_Msk
  *                @arg SYSCTRL_ISR_LSEFAULT_Msk
  *                @arg SYSCTRL_ISR_HSEFAIL_Msk
  *                @arg SYSCTRL_ISR_LSEFAIL_Msk
  *                @arg SYSCTRL_ISR_LSERDY_Msk
  *                @arg SYSCTRL_ISR_LSIRDY_Msk
  *                @arg SYSCTRL_ISR_HSERDY_Msk
  *                @arg SYSCTRL_ISR_HSIRDY_Msk
  * @retval
  */
#define HAL_SYSCTRL_GET_FLAG(FLAG)               (SYM_SYSCTRL->ISR & (FLAG))

/**
  * @brief  清除 SYSCTRL 时钟标志
  * @param  FLAG : SYSCTRL 时钟标志
  *                @arg SYSCTRL_ICR_HSEFAULT_Msk
  *                @arg SYSCTRL_ICR_LSEFAULT_Msk
  *                @arg SYSCTRL_ICR_HSEFAIL_Msk
  *                @arg SYSCTRL_ICR_LSEFAIL_Msk
  *                @arg SYSCTRL_ICR_LSERDY_Msk
  *                @arg SYSCTRL_ICR_LSIRDY_Msk
  *                @arg SYSCTRL_ICR_HSERDY_Msk
  *                @arg SYSCTRL_ICR_HSIRDY_Msk
  *                @arg SYSCTRL_ICR_FLAG_ALL
  * @retval
  */
#define HAL_SYSCTRL_CLR_FLAG(FLAG)               (SYM_SYSCTRL->ICR = ~((uint32_t)(FLAG)))

/**
  * @brief  获取 SYSCTRL 系统复位标志
  * @param  FLAG : SYSCTRL 系统复位标志
  *                @arg SYSCTRL_RESETFLAG_SYSRESETREQ_Msk
  *                @arg SYSCTRL_RESETFLAG_LOCKUP_Msk
  *                @arg SYSCTRL_RESETFLAG_RSTB_Msk
  *                @arg SYSCTRL_RESETFLAG_IWDT_Msk
  *                @arg SYSCTRL_RESETFLAG_LVD_Msk
  *                @arg SYSCTRL_RESETFLAG_POR_Msk
  * @retval
  */

#define HAL_SYSCTRL_GET_RESET_FLAG(FLAG)         (SYM_SYSCTRL->RESETFLAG & (FLAG))

/**
  * @brief  清除 SYSCTRL 系统复位标志
  * @param  FLAG : SYSCTRL 系统复位标志
  *                @arg SYSCTRL_RESETFLAG_SYSRESETREQ_Msk
  *                @arg SYSCTRL_RESETFLAG_LOCKUP_Msk
  *                @arg SYSCTRL_RESETFLAG_RSTB_Msk
  *                @arg SYSCTRL_RESETFLAG_IWDT_Msk
  *                @arg SYSCTRL_RESETFLAG_LVD_Msk
  *                @arg SYSCTRL_RESETFLAG_POR_Msk
  * @retval
  */
#define HAL_SYSCTRL_CLR_RESET_FLAG(FLAG)         (SYM_SYSCTRL->RESETFLAG = ~((uint32_t)(FLAG)))

/**
  * @brief  内核SYSRESETREQ复位，M0+内核/外设（除 RAM 控制器和 LVD 外）全部复位
  * @param  None
  * @retval
  */
#define HAL_SYSCTRL_SYSRESETREQ()                NVIC_SystemReset()

/**
  * @brief  使能调试状态下定时器正常计数功能
  * @param  TIMSOURCE : TIM类型
  *                     @arg SYSCTRL_DEBUGEN_IWDT_Msk
  *                     @arg SYSCTRL_DEBUGEN_RTC_Msk
  *                     @arg SYSCTRL_DEBUGEN_LPTIM_Msk
  *                     @arg SYSCTRL_DEBUGEN_BTIM_Msk
  *                     @arg SYSCTRL_DEBUGEN_GTIM1_Msk
  *                     @arg SYSCTRL_DEBUGEN_ATIM_Msk
  * @retval
  */
#define HAL_SYSCTRL_DEBUG_ENABLE_TIM(TIMSOURCE)  (SYM_SYSCTRL->DEBUGEN &= ~((uint32_t)(TIMSOURCE)))

/**
  * @brief  关闭调试状态下定时器正常计数，定时器暂停计数
  * @param  TIMSOURCE : TIM类型
  *                     @arg SYSCTRL_DEBUGEN_IWDT_Msk
  *                     @arg SYSCTRL_DEBUGEN_RTC_Msk
  *                     @arg SYSCTRL_DEBUGEN_LPTIM_Msk
  *                     @arg SYSCTRL_DEBUGEN_BTIM_Msk
  *                     @arg SYSCTRL_DEBUGEN_GTIM1_Msk
  *                     @arg SYSCTRL_DEBUGEN_ATIM_Msk
  * @retval
  */
#define HAL_SYSCTRL_DEBUG_DISABLE_TIM(TIMSOURCE) (SYM_SYSCTRL->DEBUGEN |= (TIMSOURCE))

/**
  * @brief  外设时钟控制AHBEN GPIOB clock Enable
  *         外设时钟控制AHBEN GPIOB clock Disable
  * @param  None
  * @retval None
  */
#define HAL_SYSCTRL_GPIOB_CLK_ENABLE()           (SYM_SYSCTRL->AHBEN |= SYSCTRL_CR_KEY | SYSCTRL_AHBEN_GPIOB_Msk)
#define HAL_SYSCTRL_GPIOB_CLK_DISABLE()          (SYM_SYSCTRL->AHBEN  = SYSCTRL_CR_KEY | \
                                                                       (SYM_SYSCTRL->AHBEN & (~SYSCTRL_AHBEN_GPIOB_Msk)))

/**
  * @brief  外设复位控制AHBRST GPIOB RST Enable
  *         外设复位控制AHBRST GPIOB RST Disable
  * @param  None
  * @retval None
  */
#define HAL_SYSCTRL_GPIOB_RST_ENABLE()           (SYM_SYSCTRL->AHBRST &= ~SYSCTRL_AHBRST_GPIOB_Msk)
#define HAL_SYSCTRL_GPIOB_RST_DISABLE()          (SYM_SYSCTRL->AHBRST |=  SYSCTRL_AHBRST_GPIOB_Msk)


/**
  * @brief  外设时钟控制AHBEN GPIOA clock Enable
  *         外设时钟控制AHBEN GPIOA clock Disable
  * @param  None
  * @retval None
  */
#define HAL_SYSCTRL_GPIOA_CLK_ENABLE()           (SYM_SYSCTRL->AHBEN |= SYSCTRL_CR_KEY | SYSCTRL_AHBEN_GPIOA_Msk)
#define HAL_SYSCTRL_GPIOA_CLK_DISABLE()          (SYM_SYSCTRL->AHBEN  = SYSCTRL_CR_KEY | \
                                                                       (SYM_SYSCTRL->AHBEN & (~SYSCTRL_AHBEN_GPIOA_Msk)))

/**
  * @brief  外设复位控制AHBRST GPIOA RST Enable
  *         外设复位控制AHBRST GPIOA RST Disable
  * @param  None
  * @retval None
  */
#define HAL_SYSCTRL_GPIOA_RST_ENABLE()           (SYM_SYSCTRL->AHBRST &= ~SYSCTRL_AHBRST_GPIOA_Msk)
#define HAL_SYSCTRL_GPIOA_RST_DISABLE()          (SYM_SYSCTRL->AHBRST |=  SYSCTRL_AHBRST_GPIOA_Msk)


/**
  * @brief  外设时钟控制AHBEN CRC clock Enable
  *         外设时钟控制AHBEN CRC clock Disable
  * @param  None
  * @retval None
  */
#define HAL_SYSCTRL_CRC_CLK_ENABLE()             (SYM_SYSCTRL->AHBEN |= SYSCTRL_CR_KEY | SYSCTRL_AHBEN_CRC_Msk)
#define HAL_SYSCTRL_CRC_CLK_DISABLE()            (SYM_SYSCTRL->AHBEN  = SYSCTRL_CR_KEY | \
                                                                       (SYM_SYSCTRL->AHBEN & (~SYSCTRL_AHBEN_CRC_Msk)))

/**
  * @brief  外设复位控制AHBRST CRC RST Enable
  *         外设复位控制AHBRST CRC RST Disable
  * @param  None
  * @retval None
  */
#define HAL_SYSCTRL_CRC_RST_ENABLE()             (SYM_SYSCTRL->AHBRST &= ~SYSCTRL_AHBRST_CRC_Msk)
#define HAL_SYSCTRL_CRC_RST_DISABLE()            (SYM_SYSCTRL->AHBRST |=  SYSCTRL_AHBRST_CRC_Msk)


/**
  * @brief  外设时钟控制AHBEN FLASH clock Enable
  *         外设时钟控制AHBEN FLASH clock Disable
  * @param  None
  * @retval None
  */
#define HAL_SYSCTRL_FLASH_CLK_ENABLE()           (SYM_SYSCTRL->AHBEN |= SYSCTRL_CR_KEY | SYSCTRL_AHBEN_FLASH_Msk)
#define HAL_SYSCTRL_FLASH_CLK_DISABLE()          (SYM_SYSCTRL->AHBEN  = SYSCTRL_CR_KEY | \
                                                                       (SYM_SYSCTRL->AHBEN & (~SYSCTRL_AHBEN_FLASH_Msk)))

/**
  * @brief  外设复位控制AHBRST FLASH RST Enable
  *         外设复位控制AHBRST FLASH RST Disable
  * @param  None
  * @retval None
  */
#define HAL_SYSCTRL_FLASH_RST_ENABLE()           (SYM_SYSCTRL->AHBRST &= ~SYSCTRL_AHBRST_FLASH_Msk)
#define HAL_SYSCTRL_FLASH_RST_DISABLE()          (SYM_SYSCTRL->AHBRST |=  SYSCTRL_AHBRST_FLASH_Msk)


/**
  * @brief  外设时钟控制AHBEN ALL clock Enable
  *         外设时钟控制AHBEN ALL clock Disable
  * @param  None
  * @retval None
  */
#define HAL_SYSCTRL_AHBALL_CLK_ENABLE()          (SYM_SYSCTRL->AHBEN = SYSCTRL_CR_KEY | 0xFFFFUL)
#define HAL_SYSCTRL_AHBALL_CLK_DISABLE()         (SYM_SYSCTRL->AHBEN = SYSCTRL_CR_KEY | 0x0000UL)


/**
  * @brief  外设复位控制AHBRST ALL RST Enable
  *         外设复位控制AHBRST ALL RST Disable
  * @param  None
  * @retval None
  */
#define HAL_SYSCTRL_AHBALL_RST_ENABLE()          (SYM_SYSCTRL->AHBRST = 0x0000UL)
#define HAL_SYSCTRL_AHBALL_RST_DISABLE()         (SYM_SYSCTRL->AHBRST = 0xFFFFUL)


/**
  * @brief  外设时钟控制APBEN1 GTIM1 clock Enable
  *         外设时钟控制APBEN1 GTIM1 clock Disable
  * @param  None
  * @retval None
  */
#define HAL_SYSCTRL_GTIM1_CLK_ENABLE()           (SYM_SYSCTRL->APBEN1 |= SYSCTRL_CR_KEY | SYSCTRL_APBEN1_GTIM1_Msk)
#define HAL_SYSCTRL_GTIM1_CLK_DISABLE()          (SYM_SYSCTRL->APBEN1  = SYSCTRL_CR_KEY | \
                                                                        (SYM_SYSCTRL->APBEN1 & (~SYSCTRL_APBEN1_GTIM1_Msk)))

/**
  * @brief  外设复位控制APBRST1 GTIM1 RST Enable
  *         外设复位控制APBRST1 GTIM1 RST Disable
  * @param  None
  * @retval None
  */
#define HAL_SYSCTRL_GTIM1_RST_ENABLE()           (SYM_SYSCTRL->APBRST1 &= ~SYSCTRL_APBRST1_GTIM1_Msk)
#define HAL_SYSCTRL_GTIM1_RST_DISABLE()          (SYM_SYSCTRL->APBRST1 |=  SYSCTRL_APBRST1_GTIM1_Msk)


/**
  * @brief  外设时钟控制APBEN1 ATIM clock Enable
  *         外设时钟控制APBEN1 ATIM clock Disable
  * @param  None
  * @retval None
  */
#define HAL_SYSCTRL_ATIM_CLK_ENABLE()            (SYM_SYSCTRL->APBEN1 |= SYSCTRL_CR_KEY | SYSCTRL_APBEN1_ATIM_Msk)
#define HAL_SYSCTRL_ATIM_CLK_DISABLE()           (SYM_SYSCTRL->APBEN1  = SYSCTRL_CR_KEY | \
                                                                        (SYM_SYSCTRL->APBEN1 & (~SYSCTRL_APBEN1_ATIM_Msk)))

/**
  * @brief  外设复位控制APBRST1 ATIM RST Enable
  *         外设复位控制APBRST1 ATIM RST Disable
  * @param  None
  * @retval None
  */
#define HAL_SYSCTRL_ATIM_RST_ENABLE()            (SYM_SYSCTRL->APBRST1 &= ~SYSCTRL_APBRST1_ATIM_Msk)
#define HAL_SYSCTRL_ATIM_RST_DISABLE()           (SYM_SYSCTRL->APBRST1 |=  SYSCTRL_APBRST1_ATIM_Msk)


/**
  * @brief  外设时钟控制APBEN1 UART2 clock Enable
  *         外设时钟控制APBEN1 UART2 clock Disable
  * @param  None
  * @retval None
  */
#define HAL_SYSCTRL_UART2_CLK_ENABLE()           (SYM_SYSCTRL->APBEN1 |= SYSCTRL_CR_KEY | SYSCTRL_APBEN1_UART2_Msk)
#define HAL_SYSCTRL_UART2_CLK_DISABLE()          (SYM_SYSCTRL->APBEN1  = SYSCTRL_CR_KEY | \
                                                                        (SYM_SYSCTRL->APBEN1 & (~SYSCTRL_APBEN1_UART2_Msk)))

/**
  * @brief  外设复位控制APBRST1 UART2 RST Enable
  *         外设复位控制APBRST1 UART2 RST Disable
  * @param  None
  * @retval None
  */
#define HAL_SYSCTRL_UART2_RST_ENABLE()           (SYM_SYSCTRL->APBRST1 &= ~SYSCTRL_APBRST1_UART2_Msk)
#define HAL_SYSCTRL_UART2_RST_DISABLE()          (SYM_SYSCTRL->APBRST1 |=  SYSCTRL_APBRST1_UART2_Msk)


/**
  * @brief  外设时钟控制APBEN1 UART1 clock Enable
  *         外设时钟控制APBEN1 UART1 clock Disable
  * @param  None
  * @retval None
  */
#define HAL_SYSCTRL_UART1_CLK_ENABLE()           (SYM_SYSCTRL->APBEN1 |= SYSCTRL_CR_KEY | SYSCTRL_APBEN1_UART1_Msk)
#define HAL_SYSCTRL_UART1_CLK_DISABLE()          (SYM_SYSCTRL->APBEN1  = SYSCTRL_CR_KEY | \
                                                                        (SYM_SYSCTRL->APBEN1 & (~SYSCTRL_APBEN1_UART1_Msk)))

/**
  * @brief  外设复位控制APBRST1 UART1 RST Enable
  *         外设复位控制APBRST1 UART1 RST Disable
  * @param  None
  * @retval None
  */
#define HAL_SYSCTRL_UART1_RST_ENABLE()           (SYM_SYSCTRL->APBRST1 &= ~SYSCTRL_APBRST1_UART1_Msk)
#define HAL_SYSCTRL_UART1_RST_DISABLE()          (SYM_SYSCTRL->APBRST1 |=  SYSCTRL_APBRST1_UART1_Msk)


/**
  * @brief  外设时钟控制APBEN1 SPI1 clock Enable
  *         外设时钟控制APBEN1 SPI1 clock Disable
  * @param  None
  * @retval None
  */
#define HAL_SYSCTRL_SPI1_CLK_ENABLE()            (SYM_SYSCTRL->APBEN1 |= SYSCTRL_CR_KEY | SYSCTRL_APBEN1_SPI1_Msk)
#define HAL_SYSCTRL_SPI1_CLK_DISABLE()           (SYM_SYSCTRL->APBEN1  = SYSCTRL_CR_KEY | \
                                                                        (SYM_SYSCTRL->APBEN1 & (~SYSCTRL_APBEN1_SPI1_Msk)))

/**
  * @brief  外设复位控制APBRST1 SPI1 RST Enable
  *         外设复位控制APBRST1 SPI1 RST Disable
  * @param  None
  * @retval None
  */
#define HAL_SYSCTRL_SPI1_RST_ENABLE()            (SYM_SYSCTRL->APBRST1 &= ~SYSCTRL_APBRST1_SPI1_Msk)
#define HAL_SYSCTRL_SPI1_RST_DISABLE()           (SYM_SYSCTRL->APBRST1 |=  SYSCTRL_APBRST1_SPI1_Msk)


/**
  * @brief  外设时钟控制APBEN1 VC clock Enable
  *         外设时钟控制APBEN1 VC clock Disable
  * @param  None
  * @retval None
  */
#define HAL_SYSCTRL_VC_CLK_ENABLE()              (SYM_SYSCTRL->APBEN1 |= SYSCTRL_CR_KEY | SYSCTRL_APBEN1_VC_Msk)
#define HAL_SYSCTRL_VC_CLK_DISABLE()             (SYM_SYSCTRL->APBEN1  = SYSCTRL_CR_KEY | \
                                                                        (SYM_SYSCTRL->APBEN1 & (~SYSCTRL_APBEN1_VC_Msk)))

/**
  * @brief  外设复位控制APBRST1 VC RST Enable
  *         外设复位控制APBRST1 VC RST Disable
  * @param  None
  * @retval None
  */
#define HAL_SYSCTRL_VC_RST_ENABLE()              (SYM_SYSCTRL->APBRST1 &= ~SYSCTRL_APBRST1_VC_Msk)
#define HAL_SYSCTRL_VC_RST_DISABLE()             (SYM_SYSCTRL->APBRST1 |=  SYSCTRL_APBRST1_VC_Msk)


/**
  * @brief  外设时钟控制APBEN1 ADC clock Enable
  *         外设时钟控制APBEN1 ADC clock Disable
  * @param  None
  * @retval None
  */
#define HAL_SYSCTRL_ADC_CLK_ENABLE()             (SYM_SYSCTRL->APBEN1 |= SYSCTRL_CR_KEY | SYSCTRL_APBEN1_ADC_Msk)
#define HAL_SYSCTRL_ADC_CLK_DISABLE()            (SYM_SYSCTRL->APBEN1  = SYSCTRL_CR_KEY | \
                                                                        (SYM_SYSCTRL->APBEN1 & (~SYSCTRL_APBEN1_ADC_Msk)))

/**
  * @brief  外设复位控制APBRST1 ADC RST Enable
  *         外设复位控制APBRST1 ADC RST Disable
  * @param  None
  * @retval None
  */
#define HAL_SYSCTRL_ADC_RST_ENABLE()             (SYM_SYSCTRL->APBRST1 &= ~SYSCTRL_APBRST1_ADC_Msk)
#define HAL_SYSCTRL_ADC_RST_DISABLE()            (SYM_SYSCTRL->APBRST1 |=  SYSCTRL_APBRST1_ADC_Msk)


/**
  * @brief  外设时钟控制APBEN1 ALL clock Enable
  *         外设时钟控制APBEN1 ALL clock Disable
  * @param  None
  * @retval None
  */
#define HAL_SYSCTRL_APB1ALL_CLK_ENABLE()         (SYM_SYSCTRL->APBEN1 = SYSCTRL_CR_KEY | 0xFFFFUL)
#define HAL_SYSCTRL_APB1ALL_CLK_DISABLE()        (SYM_SYSCTRL->APBEN1 = SYSCTRL_CR_KEY | 0x0000UL)


/**
  * @brief  外设复位控制APBRST1 ALL RST Enable
  *         外设复位控制APBRST1 ALL RST Disable
  * @param  None
  * @retval None
  */
#define HAL_SYSCTRL_APB1ALL_RST_ENABLE()         (SYM_SYSCTRL->APBRST1 = 0x0000UL)
#define HAL_SYSCTRL_APB1ALL_RST_DISABLE()        (SYM_SYSCTRL->APBRST1 = 0xFFFFUL)


/**
  * @brief  外设时钟控制APBEN2 LPTIM clock Enable
  *         外设时钟控制APBEN2 LPTIM clock Disable
  * @param  None
  * @retval None
  */
#define HAL_SYSCTRL_LPTIM_CLK_ENABLE()           (SYM_SYSCTRL->APBEN2 |= SYSCTRL_CR_KEY | SYSCTRL_APBEN2_LPTIM_Msk)
#define HAL_SYSCTRL_LPTIM_CLK_DISABLE()          (SYM_SYSCTRL->APBEN2  = SYSCTRL_CR_KEY | \
                                                                        (SYM_SYSCTRL->APBEN2 & (~SYSCTRL_APBEN2_LPTIM_Msk)))

/**
  * @brief  外设复位控制APBRST2 LPTIM RST Enable
  *         外设复位控制APBRST2 LPTIM RST Disable
  * @param  None
  * @retval None
  */
#define HAL_SYSCTRL_LPTIM_RST_ENABLE()           (SYM_SYSCTRL->APBRST2 &= ~SYSCTRL_APBRST2_LPTIM_Msk)
#define HAL_SYSCTRL_LPTIM_RST_DISABLE()          (SYM_SYSCTRL->APBRST2 |=  SYSCTRL_APBRST2_LPTIM_Msk)


/**
  * @brief  外设时钟控制APBEN2 I2C1 clock Enable
  *         外设时钟控制APBEN2 I2C1 clock Disable
  * @param  None
  * @retval None
  */
#define HAL_SYSCTRL_I2C1_CLK_ENABLE()            (SYM_SYSCTRL->APBEN2 |= SYSCTRL_CR_KEY | SYSCTRL_APBEN2_I2C1_Msk)
#define HAL_SYSCTRL_I2C1_CLK_DISABLE()           (SYM_SYSCTRL->APBEN2  = SYSCTRL_CR_KEY | \
                                                                        (SYM_SYSCTRL->APBEN2 & (~SYSCTRL_APBEN2_I2C1_Msk)))

/**
  * @brief  外设复位控制APBRST2 I2C1 RST Enable
  *         外设复位控制APBRST2 I2C1 RST Disable
  * @param  None
  * @retval None
  */
#define HAL_SYSCTRL_I2C1_RST_ENABLE()            (SYM_SYSCTRL->APBRST2 &= ~SYSCTRL_APBRST2_I2C1_Msk)
#define HAL_SYSCTRL_I2C1_RST_DISABLE()           (SYM_SYSCTRL->APBRST2 |=  SYSCTRL_APBRST2_I2C1_Msk)


/**
  * @brief  外设时钟控制APBEN2 IWDT clock Enable
  *         外设时钟控制APBEN2 IWDT clock Disable
  * @param  None
  * @retval None
  */
#define HAL_SYSCTRL_IWDT_CLK_ENABLE()            (SYM_SYSCTRL->APBEN2 |= SYSCTRL_CR_KEY | SYSCTRL_APBEN2_IWDT_Msk)
#define HAL_SYSCTRL_IWDT_CLK_DISABLE()           (SYM_SYSCTRL->APBEN2  = SYSCTRL_CR_KEY | \
                                                                        (SYM_SYSCTRL->APBEN2 & (~SYSCTRL_APBEN2_IWDT_Msk)))

/**
  * @brief  外设复位控制APBRST2 IWDT RST Enable
  *         外设复位控制APBRST2 IWDT RST Disable
  * @param  None
  * @retval None
  */
#define HAL_SYSCTRL_IWDT_RST_ENABLE()            (SYM_SYSCTRL->APBRST2 &= ~SYSCTRL_APBRST2_IWDT_Msk)
#define HAL_SYSCTRL_IWDT_RST_DISABLE()           (SYM_SYSCTRL->APBRST2 |=  SYSCTRL_APBRST2_IWDT_Msk)


/**
  * @brief  外设时钟控制APBEN2 BTIM clock Enable
  *         外设时钟控制APBEN2 BTIM clock Disable
  * @param  None
  * @retval None
  */
#define HAL_SYSCTRL_BTIM_CLK_ENABLE()            (SYM_SYSCTRL->APBEN2 |= SYSCTRL_CR_KEY | SYSCTRL_APBEN2_BTIM_Msk)
#define HAL_SYSCTRL_BTIM_CLK_DISABLE()           (SYM_SYSCTRL->APBEN2  = SYSCTRL_CR_KEY | \
                                                                        (SYM_SYSCTRL->APBEN2 & (~SYSCTRL_APBEN2_BTIM_Msk)))

/**
  * @brief  外设复位控制APBRST2 BTIM RST Enable
  *         外设复位控制APBRST2 BTIM RST Disable
  * @param  None
  * @retval None
  */
#define HAL_SYSCTRL_BTIM_RST_ENABLE()            (SYM_SYSCTRL->APBRST2 &= ~SYSCTRL_APBRST2_BTIM_Msk)
#define HAL_SYSCTRL_BTIM_RST_DISABLE()           (SYM_SYSCTRL->APBRST2 |=  SYSCTRL_APBRST2_BTIM_Msk)


/**
  * @brief  外设时钟控制APBEN2 RTC clock Enable
  *         外设时钟控制APBEN2 RTC clock Disable
  * @param  None
  * @retval None
  */
#define HAL_SYSCTRL_RTC_CLK_ENABLE()             (SYM_SYSCTRL->APBEN2 |= SYSCTRL_CR_KEY | SYSCTRL_APBEN2_RTC_Msk)
#define HAL_SYSCTRL_RTC_CLK_DISABLE()            (SYM_SYSCTRL->APBEN2  = SYSCTRL_CR_KEY | \
                                                                        (SYM_SYSCTRL->APBEN2 & (~SYSCTRL_APBEN2_RTC_Msk)))

/**
  * @brief  外设复位控制APBRST2 RTC RST Enable
  *         外设复位控制APBRST2 RTC RST Disable
  * @param  None
  * @retval None
  */
#define HAL_SYSCTRL_RTC_RST_ENABLE()             (SYM_SYSCTRL->APBRST2 &= ~SYSCTRL_APBRST2_RTC_Msk)
#define HAL_SYSCTRL_RTC_RST_DISABLE()            (SYM_SYSCTRL->APBRST2 |=  SYSCTRL_APBRST2_RTC_Msk)


/**
  * @brief  外设时钟控制APBEN2 ALL clock Enable
  *         外设时钟控制APBEN2 ALL clock Disable
  * @param  None
  * @retval None
  */
#define HAL_SYSCTRL_APB2ALL_CLK_ENABLE()         (SYM_SYSCTRL->APBEN2 = SYSCTRL_CR_KEY | 0xFFFFUL)
#define HAL_SYSCTRL_APB2ALL_CLK_DISABLE()        (SYM_SYSCTRL->APBEN2 = SYSCTRL_CR_KEY | 0x0000UL)


/**
  * @brief  外设复位控制APBRST2 ALL RST Enable
  *         外设复位控制APBRST2 ALL RST Disable
  * @param  None
  * @retval None
  */
#define HAL_SYSCTRL_APB2ALL_RST_ENABLE()         (SYM_SYSCTRL->APBRST2 = 0x0000UL)
#define HAL_SYSCTRL_APB2ALL_RST_DISABLE()        (SYM_SYSCTRL->APBRST2 = 0xFFFFUL)


/******************************************************************************/
/* Exported variables ('extern', definition in C source)                      */
/******************************************************************************/


/******************************************************************************/
/* Global function prototypes ('extern', definition in C source)              */
/******************************************************************************/
uint8_t            HAL_SysCtrl_SysClk_Switch(SYSCTRL_SysClkSrcTypeDef NewClkSource);
uint32_t           HAL_SysCtrl_GetPclkFreq(void);
uint32_t           HAL_SysCtrl_GetHclkFreq(void);
uint32_t           HAL_SysCtrl_GetLseFreq(void);
uint32_t           HAL_SysCtrl_GetHseFreq(void);
uint32_t           HAL_SysCtrl_GetLsiFreq(void);
uint32_t           HAL_SysCtrl_GetHsiFreq(void);

void               HAL_SysCtrl_HCLK_SetDiv(SYSCTRL_HclkPrsTypeDef Div);
void               HAL_SysCtrl_PCLK_SetDiv(SYSCTRL_PclkPrsTypeDef Div);

void               HAL_SysCtrl_HSI_Enable(SYSCTRL_HsiOscDivTypeDef Div);
void               HAL_SysCtrl_HSI_SetDiv(SYSCTRL_HsiOscDivTypeDef Div);
void               HAL_SysCtrl_HSI_Disable(void);

void               HAL_SysCtrl_LSI_Enable(void);
void               HAL_SysCtrl_LSI_Disable(void);

void               HAL_SysCtrl_CLKCCS_Enable(void);
void               HAL_SysCtrl_CLKCCS_Disable(void);

HAL_StatusTypeDef  HAL_SysCtrl_HSE_Enable_Crystal(uint32_t FreqIn, SYSCTRL_HseDrivrTypeDef Driver);
HAL_StatusTypeDef  HAL_SysCtrl_HSE_Enable_ExClk(uint32_t FreqIn);
void               HAL_SysCtrl_HSE_Disable(void);
void               HAL_SysCtrl_HSECCS_Enable(void);
void               HAL_SysCtrl_HSECCS_Disable(void);

HAL_StatusTypeDef  HAL_SysCtrl_LSE_Enable_Crystal(SYSCTRL_LseDrivrTypeDef Driver);
HAL_StatusTypeDef  HAL_SysCtrl_LSE_Enable_ExClk(uint32_t FreqIn);
void               HAL_SysCtrl_LSE_Disable(void);
void               HAL_SysCtrl_LSE_Lock(void);
void               HAL_SysCtrl_LSE_PinLock(void);
void               HAL_SysCtrl_LSECCS_Enable(void);
void               HAL_SysCtrl_LSECCS_Disable(void);

void               HAL_SysCtrl_RESET2GPIO(void);
void               HAL_SysCtrl_GPIO2RESET(void);
void               HAL_SysCtrl_SWD2GPIO(void);
void               HAL_SysCtrl_GPIO2SWD(void);

void               HAL_SysCtrl_ClkOut_PCLK_PA02(void);

void               HAL_SysCtrl_ClkOut_MCO_PA04(SYSCTRL_McoSrcTypeDef Source, SYSCTRL_McoDivTypeDef Div);
void               HAL_SysCtrl_ClkOut_MCO_PA08(SYSCTRL_McoSrcTypeDef Source, SYSCTRL_McoDivTypeDef Div);
void               HAL_SysCtrl_ClkOut_MCO_PB03(SYSCTRL_McoSrcTypeDef Source, SYSCTRL_McoDivTypeDef Div);

void               HAL_SysCtrl_EnterDeepSleep(SYSCTRL_WakeupClkTypeDef WakeUpClk);
void               HAL_SysCtrl_EnterSleep(void);
void               HAL_SysCtrl_ConfigWaitCycle(uint32_t HclkFreq);


#ifdef __cplusplus
}
#endif

#endif /* __SYM32L010_HAL_SYSCTRL_H */


/************************ (C) COPYRIGHT SIYIMicro *****END OF FILE*************/
